TTTC Header
                Image
TTTC's Electronic Broadcasting Service

TTEP 2016

IEEE Test Technology Educational Program 2016

http://ttep.tttc-events.org/ttep/index.html

Call for DATE, LATS, VTS, ITC, and ATS Tutorial Proposals 2016

DEADLINE
September 13, 2015

Overview


The Tutorials & Education Group (TEG) of the IEEE Computer Society Test Technology Technical Council (TTTC) organizes in 2016 a comprehensive set of Test Technology Tutorials to be held in conjunction with TTTC sponsored technical meetings. The objective of this common call is to invite submissions for tutorial proposals in order to enable selecting the best fitted tutorials for each technical meeting, as part of the annual Test Technology Educational Program (TTEP).

The tutorials accepted by the Program Committee will be included in the Test Technology Educational Program, the intent of which is to serve the test and design professionals offering fundamental education and expert knowledge in state-of-the-art test technology topics.


The TTEP 2016 tutorials program includes (but is not limited to) the following technical meetings:

  • Design Automation and Test in Europe (DATE’16)
  • Latin American Test Symposium (LATS’16)
  • VLSI Test Symposium (VTS’16)
  • International Test Conference (ITC’16)
  • Asian Test Symposium (ATS’16)

TTEP accommodates a wide range of technical areas, from mature test topics of high interest to industrial test engineers to emerging test topics with emphasis on novelty. TTEP is soliciting new and updated tutorial proposals, as well as proposals for Test Clinics, which are particularly geared towards newcomers to the area of test, such as new test engineers and students pursuing graduate studies in test, with an objective of offering a broad yet comprehensive review of basic test topics in an accessible way to the lay audience. The topics of interest for year 2016 TTEP Tutorials include (but are not limited to):

  • 3D chip testing
  • Automatic test equipment
  • Board-level testing
  • Built-In Self-Test
  • Defect oriented testing
  • Design for testability
  • DFT testers
  • Diagnosis and debug
  • Embedded core testing
  • Failure analysis techniques
  • Hardware Security
  • High-speed interface testing
  • Interconnect characterization
  • Memory testing
  • Mixed-Signal/Analog testing
  • Nanometer tech testing
  • On-line and field testing
  • Performance/Delay testing
  • Microprocessor testing
  • Power issues in testing
  • Reliability and Safety
  • System-level testing
  • Test data mining
  • Test economics
  • Test synthesis
  • Test resource partitioning
  • Test related standards
  • Verification and Validation
  • Wafer testing
  • Yield optimization and test

Author Information

All tutorial proposal submissions to TTEP 2016 are to be made electronically (in PDF format using the TTEP tutorial proposal template provided in the TTEP main web site) through the following submissions website:


DEADLINE
for tutorials proposals:

September 13, 2015: Deadline for tutorial proposals for:

DATE’16
, LATS’16, VTS’16, ITC’16, and ATS’16.

Notification of acceptance dates:
November 6, 2015: Notification of acceptance for DATE’16
December 18, 2015: Notification of acceptance for VTS’16, LATS’16
June 4, 2016: Notification of acceptance for ITC’16
August 6, 2016: Notification of acceptance for ATS’16


Contact Information

Paolo Bernardi

TTEP General Chair
Politecnico di Torino, I
Committee

GENERAL CHAIR

  • P. BERNARDI – Politecnico di Torino

PROGRAM CHAIR

  • O. YAGLIOGLU  – FormFactor Inc.

PAST CHAIR

  • D. GIZOPOULOS – University of Athens

FINANCE CHAIR

  • C.-H. CHIANG – Alcatel-Lucent

PUBLICITY CHAIRS

  • G. DI NATALE – LIRMM
  • E. SANCHEZ – Politecnico di Torino

PLANNING CHAIR

  • Y. ZORIAN – Synopsis

INDUSTRIAL RELATIONS CHAIR

  • R. GALIVANCHE – INTEL Corporation

AUDIO/VISUAL CHAIRS

  • S. MENON – INTEL Corporation
  • O. SINANOGLY – NYU in Abu-Dhabi

ELECTRONIC MEDIA CHAIRS

  • S. DI CARLO – Politecnico di Torino
  • A. BOSIO – LIRMM 

ORGANIZING LIASONS

  • C. BOLCHINI – DATE'16
  • D. GIZOPOULOS – LATS'16
  • S. RAVI – VTS'16
  • Y. ZORIAN – ITC'16
  • Y. ZHANG – ATS'16

PROGRAM COMMITTEE
  • Robert C. Aitken – ARM, USA
  • Davide Appello – STMicroelectronics, I
  • Kanad Chakraborty – Lattice Semiconductor, USA
  • Sreejit Chakravarty – LSI logic, USA
  • Kun Young Chung – Samsung, USA
  • Scott Davidson – Oracle, USA
  • Anne E. Gattiker – IBM, USA
  • Kazumi Hatayama – NAIST, J
  • Doug Josephson – Intel Corporation, USA
  • Hans Manhaeve – Qstar, B
  • Amit Majumdar – Xilinx, USA
  • Erik Jan Marinissen – IMEC, B
  • Stephen Sunter – Mentor, USA
  • Baosheng Wang – AMD, USA
For more information, visit us on the web at: http://ttep.tttc-events.org/ttep/index.html

The Test Technology Educational Program 2016 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

PAST CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

TTTC 1ST VICE CHAIR
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

ITC GENERAL CHAIR
Gordon W. ROBERTS
McGill University
- Canada
Tel. +1-514-398-6029
E-mail gordon.roberts@mcgill.ca

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI

Politecnico di Torino
- Italy
Tel. +39-011-564-7183
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

 

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 2ND VICE CHAIR
Rohit KAPUR

Synopsys, Inc.
- USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
Krish CHAKRABARTY
Duke University - USA
E-mail krish@ee.duke.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Patrick GIRARD
LIRMM - France
Tel.+33 467 418 629
E-mail patrick.girard@lirmm.fr

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
Tel.+81-743-72-5221
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com